The Road to Bionic and High Speed Logic Operations－Emerging 3D RRAM Architectures and Applications

The global memory market is entering an era during which it must begin searching for alternative technologies. In recent years, the rapid development of the Internet of Things, mobile devices, high-speed computers, smart cars and other such industries has significantly increased the demand for mass computing architectures such as AI and Edge Computing. Consequently, the power consumption and data access speed of existing high-capacity storage elements such as DRAM and NAND Flash have been unable to keep up with the growing demands. Furthermore, with the shrinking of the semiconductor line width past 14nm, mainstream transistor development has shifted to advanced structures such as FinFET and GAA. However, the embedded NOR Flash, which has long been used for storage on CMOS chips, suffers from the “Flash Memory Scaling Limit” problem. It has also been unable to keep up with the development requirements of the SoC chip integration process. As such, we need new embedded, non-volatile memory technology that can match the next generation of ASICs and MCUs that will be manufactured with advanced processes.

Over the last few decades, the joint efforts of countries around the world have led to the development of a variety of next generation non-volatile memory technologies such as ferroelectric memory (FRAM), phase change memory (PRAM), magnetoresistive memory (MRAM), and resistive memory (RRAM), etc. These emerging technology candidates not only read and write more than 1,000 times faster than NAND Flash but are also capable of operating at nanoamp (nA) low current levels. At the same time, they have the potential to break through the bottleneck of the von Neumann architecture as well as the ability to realize In-memory Computing.

Among the various emerging next generation memory technologies, resistive memory is considered by the industry to be the best choice for next generation general purpose memory because of its comparatively fast reading and writing speed, low energy consumption, simple structure, long data storage time, good endurance, low manufacturing cost and other such product advantages. In addition, its analog conductance (resistive) gradient characteristics make it suitable for neuromorphic computing. As such, it is also the memory technology that has seen the most in R&D investments by manufacturers such as Adesto (acquired by Dialog in 2020), Crossbar, Samsung, Panasonic, Micron, Hynix, Intel and more. Each of these companies has its own resistive memory technology.

In this issue of the “New Technology Channel | Collaboration Column”, MA-tek has specially invited Professor Yeong-Her Wang, a top scholar in the field of resistive memory research, to write an article introducing the development and trends of this emerging memory technology to help our readers understand the progress being made in the academic research for this important technological field.

Director of R&D Center & Marketing Division, Chris Chen, 2022/04/20

Opening the Road to Bionic and High Speed Logic Operations－Emerging 3D RRAM Architectures and Applications

Professor Yeong-Her Wang  

Institute of Microelectronics, National Cheng Kung University

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The development of resistive memory technology began in the 1960s when the researcher Hickmott found that, through the application of a voltage or current, the resistance state of aluminum oxide (AlO_x), could be changed [1]. In recent years, studies have found that nickel oxide (NiO) [2-5], titanium oxide (TiO_x) [6-9], hafnium oxide (HfO_x) [10-13] and other insulator materials can also be used as intermediate insulating layers for RRAM. RRAM can use a specific voltage to read the resistance value (current value) in different states then determine whether the logic state of the component is ”1” or ”0”. In addition, RRAM has good non-volatile memory characteristics. A signal storage state can be saved, without external bias, until the next signal writing or erasure.

The physical RRAM mechanism currently attracting the most attention is the Filament Theory [14-16]. It is generally believed that RRAM operates by giving the component a large applied bias at the beginning, making conductive paths inside the insulating oxide layer. At this point, the insulating layer changes to a Low Resistance State (LRS). This process usually requires the use of a Compliance Current to avoid an excessive current that might react violently and permanently collapse the component. This step is referred to as Forming. Then the component bias voltage is used to control the recombination of oxygen ions and oxygen vacancies, which blocks the conduction path. The component then returns from the Low Resistance State (LRS) to the High Resistance State (HRS). This is known as the Reset process. Then, again, apply a voltage that is less than the voltage required for Forming. The blocked conduction path can thus be reconnected, and the component can again be returned from the High Resistance State (HRS) to the Low Resistance State (LRS). This step is called the Set.

RRAM writing and erasure is achieved through alternating repeatedly between the Set and Reset processes. The operation flow of RRAM is shown in Figure 1. In terms of reading, a small reading voltage is used to determine different resistance values, thus distinguishing between 0 and 1 digital signals (Figure 2). RRAM can be divided into filament-type RRAM and interface-type RRAM based on the change of resistance states. Filament RRAM has a continuous conduction path between the upper and lower electrodes (Figure 3). It is also the most widely recognized type of RRAM conduction mechanism. Then there is the interface RRAM (Figure 4). The resistance state is changed by applying an external voltage, forming oxygen vacancies or carrier charges in the insulator layer for electron transfer. When oxygen vacancies or carrier charges increase, the current increases. Therefore, the surface area of the insulator layer between the component electrodes will affect the resistance state changes.

Figure 1.　RRAM Switching Process and Electrical Output

Figure 2.　RRAM Digital Interpretation Method

Figure 3.　Filament-Type RRAM RRAM Operation Process [14]

Figure 4.　Interface RRAM Output Characteristic Curve and Operating Principle [14]

RRAM operation can be divided into two modes：

• Unipolar：As shown in Figure 5(a), this mode uses a single-direction voltage to perform the Set and Reset processes. The Reset process causes the resistance filament to fuse due to Joule Heating, thus changing the resistance state.
• Bipolar：This mode is where the operating voltage must be reversed to perform the Set and Reset processes. It is generally believed that the reason for the switching of resistance states is the movement of oxygen ions, which causes redox action in the resistance filament, leading to the change between high and low resistance states as shown in Figure 5(b).

Figure 5.　RRAM Operation Mode (a) Unipolar; (b) Bipolar [17]

In ideal metal/insulator/metal structures, currents do not flow through the insulating layer in the middle when a bias voltage is applied. However, in reality, when the component is subjected to excessive electric fields or temperatures, it is possible for carriers to move through the insulating layer, generating a leakage current and reading the HRS. The current movement mechanism or how the current is moving between the insulating layers can be evaluated by performing Current-Fitting on current-voltage behavior. Most such transmission mechanisms can be divided into the following types：

Figure 6.　Ohmic Conduction Energy Band Diagram

1．Ohmic Conduction： This mainly uses the Free Electrons in the Conduction Band and the holes in the Valence Band as the carrier transport mechanism. The resistance is constant when the voltage is small. It has a linear relationship with the current. Figure 6 is a schematic diagram of the ohmic conduction band of the RRAM structure. The carriers in the material are moved by the applied electric field, generating a current [18].

Figure 7.　Schottky Emission Energy Band Diagram

2．Schottky Emission： Generally, there will be a Barrier Height at the junction between the metal and the insulator. This barrier height refers to the difference between the electron affinity of the insulator and the work function of the metal. Figure 7 shows the energy band diagram of a RRAM. Image charge can be generated by electrons passing through a metal surface when an electric field is applied, causing the barrier height to drop. Thermal excitation then causes electrons to cross the energy barrier height. In this way, electrons can travel across the conduction band of an insulator, generating a current known as a Schottky Emission [19].

Figure 8.　Frenkel-Poole Emission Energy Band Diagram

3．Frenkel- Poole Emission： This conduction mechanism is similar to Schottky Emission. It is also affected by the applied electric field. Electrons gain energy from thermal excitation, and the barrier height for carriers jumping to the valence or conduction bands is reduced, enabling carriers to jump over the energy barrier to the valence or conduction bands. The conduction band transfers the current. At this time, the energy barrier height is tied to the deposition of insulator or semiconductor thin films and the dangling bonds or defects they produce. These defects form defect levels near the edges of the valence or conduction bands, and the difference between the energy levels in the defects and the valence or conduction bands is the height of the energy barrier that the Frenkel-Poole Emission needs to cross [20]. Its energy band diagram is shown in Figure 8.

Figure 9.　Hopping Conduction Energy Band Diagram

4．Hopping Conduction： If there are many continuous defects in a film, these continuous defects create continuous defect energy levels in the insulator. In this situation, electrons do not need to be excited to get to the conduction band. Instead, the jump transfer is carried out by defect energy levels that are close to each other, thus generating a current. The smaller the distance between the defects, the smaller the activation energy required for electrons to jump the energy level. This is known as Hopping Conduction. Its energy band diagram is shown in Figure 9 [21].

Figure 10.　Tunneling Energy Band Diagram

5．Tunneling： Mainly, when the applied electric field is too large, the Ec, Ev energy band diagram becomes more inclined (in other words, the voltage difference between the two sides becomes larger). This leads to a thinner insulator band, so electrons can tunnel directly through the insulating layer to the other side to generate a current. Its energy band diagram is shown in Figure 10 [22].

Figure 11.　 Space Charge Limited Current Energy Band Diagram

6．Space Charge Limited Current： When an ohmic contact is formed on one or both sides of the insulator, the electrodes can provide an uninterrupted carrier supply. Then when a contact electrode injects electrons into the conduction band of an insulator or semiconductor, since the carrier injection rate is greater than the recombination rate, charge will slowly build up inside the insulator. This will affect the flow of the current. This creates a Space Charge Limited Current. The energy band diagram is shown in Figure 11 [23].

During the development of memory technology, the goal of increasing the density on integrated circuits led to the development of a structure arrangement known as a Crossbar Array [24-26]. Although it allows for a higher composition density, the Crossbar Array structure also creates a big problem—the generation of Sneak Path Currents (Figure 12). This is where influence by adjacent components causes misjudgments when reading the state of a specific component.

Today’s RRAM devices employ a variety of architectures to solve the sneak current problem (Figure 13). These include the combination RRAM and transistors 1T1R architecture [26-27], the combination RRAM and Selector 1S1R architecture [28-29] and more. Among them, the 1T1R architecture has received extensive attention due to its simple structure and compatibility with current CMOS processes. At present, it is mostly used for Embedded Memory that emphasizes operation speed and low costs and combined with Microcontroller Units to further enhance its performance.

Figure 12.　The RRAM Array Generates a Sneak Current that Causes Misjudgments in Component Reading

Figure 13.　Pairing the RRAM with a Switch Can Solve the Sneak Current Problem

However, as transistors continue to shrink, the voltage they can withstand is also becoming smaller. This means that RRAM components may eventually face the problem of insufficient operating voltages. In order to solve this problem, it is necessary to start with the structure and materials. In recent years, this need has influenced the development of 1T1R architecture components and inspired the development of important, novel bionics and logic operations-related applications [30-32].

Due to the rapid development of artificial intelligence, related applications, such as image recognition, speech recognition, intelligent monitoring, and smart driving, have attracted widespread attention. Deep learning and other such technologies are also demonstrating great potential for development. Among these AI-related technologies, machine learning is currently the most widely used. Machine learning is the use of multi-level Artificial Neural Networks (ANN) for data learning. Since RRAM components have Non-Volatility and Multi-Bit Storage characteristics coupled with the advantages of low energy consumption and high operating speeds, they have contributed to the development of many novel applications in recent years, including Neuromorphic and Non-Von-Neumann smart computing architectures.

Previous research findings show that there are three main issues that need to be discussed and resolved when using the 1T1R architecture, which is formed by the combination of thin film transistors with RRAM components, in component arrays and smart computing architectures：

How to combine component characteristics and manufacturing processes to realize a biomimetic RRAM array structure. How to further realize logic operations using RRAM component array structures. Finally, how to use the RRAM component array to realize the intelligent computing of artificial neural networks. The imitation of biological abilities to improve science and technology is called Bionics. The human brain is a good example. The brain is an efficient and low power system. It is capable not only of delivering messages but also of learning and remembering. The connections between neurons in the human brain are called synapses (Figure 14). The conduction behavior between synapses plays a very important role in the process of message transmission. The strength of the connections between synapses is tunable. This process, known as spike-timing-dependent plasticity (STDP), involves performing Potentiation or Depression via conditioning [33]. After integration, it causes changes according to the potential in the body, deciding whether to output neurotransmitters to the next neuron through the synapse. STDP is also considered an important basis for memory and learning in neurobiology.

Figure 14.　Schematic Diagram of Neurons and Synapses in the Human Brain

In the future, electronic components will be used to imitate the way that nerves in the brain transmit information for learning and memory. When this happens, it will be a major breakthrough for electronic technologies and applications. Our modern computers use digital signals of 0 and 1 to perform operations and store memory. The human brain is different from a computer in that it transmits information and stores memory using analog signals. The ANN concept was inspired by observations of the human central nervous system. Just like the neurons in the brain constitute the human neural network, an ANN is comprised of many interconnected computing units called nodes (Figure 15).

Figure 15.　Schematic Diagram of an Artificial Neural Network Architecture [34]

The network can usually be divided into three parts： the input layer, the hidden layer (which is usually multiple layers) and the output layer. All nodes in each layer are the same, and the nodes are connected to previous and next layers to form a neural network-like structure [34]. Outputs are obtained by estimating and approximating functions via a mathematical calculation model. This makes an ANN good at what the human brain is good at, such as image and speech recognition, classification, prediction, memory and more. It has great development potential.

The research on and related to the Multi-Level Resistance Characteristics of RRAM components and control methods have received extensive attention in recent years [35-37]. The multi-resistance operation mode for a single component is：When the component is in the Set process, set different limiting currents so that the LRS resistance of the component can be divided into multiple resistance states; During the Reset process, on the other hand, use different cut-off voltage ranges so that the HRS can have different resistance values of different levels. This enables multi-bit access capabilities on a single memory device. Figure 16 shows a Pt/LiSiO_x/TiN component, which has excellent multi-bit storage capabilities. We operated it under different Reset cut-off voltages and Set limit current conditions and were able to make the component’s resistance state changes take on a continuous state form. This resistance change form is also known as analog resistance conversion.

Because the above operation method is rather complicated in both circuit design and application, other operation methods for generating the continuous state form of RRAM components are being investigated. One such method is to perform Consecutive Voltage Sweeping on the component with a fixed cut-off voltage, thus changing the resistance state of the component via the voltage scanning method. As shown in Figure 17, for a Pt/LiSiO_x/TiN component being operated via DC, if the input voltage is less than the Reset voltage in the continuous operation state, the current will slowly decrease, and the resistance state will gradually increase. Conversely, if you input a voltage less than the Set voltage and operate continuously, the current will increase slowly, and the resistance state will gradually decrease. If the operating voltage and current are plotted against the time, it can be found that the resistance state of the component also presents a gradual transition. For general research, in addition to using the resistance value or current parameter to present the switching characteristics of components as mentioned above, the change in Conductance is used to present the resistance value transformation characteristics of components.

To use RRAM components to imitate the behavior of synapses, it is necessary to use the gradiant characteristics of the conductance (resistance) of the components to simulate the continuous adjustments of synaptic weights and synaptic plasticity. Therefore, the key parameters of the synaptic properties of the relevant RRAM components are very important. These properties include：

• Linearity: Conductance adjustment linearity
• Precision: Weight (conductance value) adjustment accuracy
• ON/OFF Ratio: The component’s maximum to minimum adjustable range of conductance values under pulse operation
• Variation: The Cycle-to-Cycle & Device-to-Device variation of components
• Defective Rate: Array yield and retention characteristics

Figure 18 shows a Pt/LiSiO_x/TiN component being operated by continuous pulse to simulate the biomimetic properties of neuronal synapses with verification components. By adjusting the size, duration and frequency of the pulse voltage, the resistance state and conductivity of the component can be changed to continuously ramp the component configuration from LRS to HRS then lower it from HRS back to LRS. This simulates the Potentiation and Depression behaviors of resistors using continuous positive and negative voltage pulse operation.

STDP experiment results show that using this component to mimic the behavior of brain synapses will aid in the development of neural-type networks. If RRAM is used as a bionic component then its resistance change state must be in the continuous state form in order to set a variety of synaptic weight values for neural-like operations. Ideal RRAM components for synaptic operations require [38](Figure 19, Figure 20)： A number of stable, multi-level conductance states Under pulse operation, the component has linear and symetrical changes in conductance values Good uniformity that reduces Cycle-to-Cycle and Device-to-Device variation Sufficient range of component conductance variation (ON/OFF Ratio)

Figure 19.　Effective Conductance State of an RRAM Component

Usually, the resistance state change of an interface-type RRAM component is relatively linear, but the memory window, Retention and Endurance are unreliable, causing difficulties in practical application. However, finding RRAM components with highly linear resistance changes is extremely important for the operation of bionic components. Past research found that if the intermediate insulating layer of the RRAM component contains a high oxygen vacancy density, conductive paths will form easily. The resistance conversions of interface-type RRAM tends to sudden rises and drops. This means that the resistance switching will behave like digital 1 and 0 signals, so it will be unable to exhibit analog resistive gradient switching behavior. However, RRAM components with dense oxygen vacancies in the insulating layer may have a better chance of exhibiting analog resistive switching characteristics while also having better reliability [38-39]. In addition to LiSiO_x materials, previous experiments found that the combination of different electrodes and stacks based on HfO_x materials may also offer analog resistive conversion characteristics (Figure 21).

The bionic properties of the above RRAM components are all based on a single component. How to combine relevant material properties with component manufacturing in the future and the development of RRAM array bionic electronic components with both analog resistance switching characteristics and high reliability (Figure 22) are all areas worth exploring in depth as we move forward.

Figure 22.　The analog RRAM component is formed from making a single component into an array component; It is very important to the development of bionic electronic components [35]

Today’s computers use the Von-Neumann architecture, where information processing and storage are separate architectures (Figure 23). This separation means that the bus transfer rate limits the data storage and operation speed. Furthermore, the realization of computer logic operations is based on the Complementary Metal-Oxide-Semiconductor (CMOS) architecture. The operation of the logic circuit depends on the high or low levels of the voltage. However, the results of those logical operations must usually be stored on external circuits or devices.

Figure 23.　Von-Neumann Architecture and System Architecture of In-Memory Computing [38]

On the other hand, using a Non-von-Neumann computing architecture would allow for the implementation of Computing in Memory, where the operation process is conducted right through the data in the memory. In other words, head operations are run directly in the memory. The results are then sent to the processor for subsequent analysis. This approach could reduce power consumption, making it an efficient way to improve computer performance [40]. RRAM is regarded as the fourth basic passive component after resistive, conductive and capacitive components (Figure 24) [41]. RRAM components have both non-volatile characteristics and neural-like computing functions, enabling them to combine computing and storage functions on a single component for the realization of In-Memory Computing. Therefore, it has great potential to become the core component of the Non-von-Neumann computing architecture (Figure 25).

Figure 24.　RRAM is the Fourth Passive Component [41]

Replacing transistive and logic circuits with RRAM components is an effective way to save space. When using RRAM as a component for logic operations, the HRS and LRS are used to represent the 0 and 1 of digital signals respectively. Logic operations are realized by changing the HRS or LRS state of the operating component. In a multi-R array component, the change of the resistance state of the component can be used as parameters for realizing logic operations (Figure 26), and the results can be stored directly in the RRAM component. This ability to combine digital signal storage and logic calculation eliminates the need for the registering function of the traditional computer architecture, thus effectively reducing the load for data transmission and improving processing speed and efficiency. It also has the advantage of low power consumption [42-43].

Figure 26.　Use the High and Low Resistance States of the RRAM Component as the Input; Can be Used for Boolean Logic Operations

However, in contrast to traditional CMOS circuits, we must still determine how to use different RRAM component structures to achieve Functional Completeness, Computation Complexity and logical Reconfigurability in logical operations in order to ascertain whether RRAM components can be used in Von-Neumann computing architectures. It would be worthwhile for us to also explore other possible applications in more depth (Figure 27).

At present, the traditional Floating-Gate Structure memory is facing the dilemma of miniaturization. This has driven numerous parties to dive into the development of next generation memory in anticipation of replacing Flash memory with an all new storage method or memory structure. The goal is not only to increase the bandwidth and reliability of component operations but also to achieve component miniaturization through a simple Cross-point Structure and increase memory storage capacities (Figure 28). RRAM components have low operating voltages, low power consumption, operating speeds more than 1,000 times faster than that of NAND Flash and other useful characteristics. It also combines the advantages of low costs, non-volatility and scalability [44]. As such, in addition to its applications in Working Memory, it has the potential to make high density memories. What’s more, RRAM materials and processes are highly compatible with current CMOS Back End of Line (BEOL) processes. Therefore, RRAM has very real productization potential and feasibility (Figure 29)[45] as well as the opportunity to integrate various memory components that are currently facing development bottlenecks to become the Universal Memory (Figure 30).

Figure 29.　Future Development Trend of RRAM [45]

Figure 30.　RRAM Has the Opportunity to Integrate Various Memories into a Universal Memory

In recent years, the application of RRAM components combined with artificial intelligence computing has attracted widespread attention. AI uses the ANN structure in image recognition, speech recognition and more. There are also other neural networks (such as the convolutional Neural Network CNN and Recurrent Neural Network RNN) that can be used for the core of artificial intelligence to provide intelligent monitoring, intelligent driving, and other related applications. In most situations, the ANN can change its internal structure based on external information, making it an adaptive system with the ability to learn.

In essence, AI operations are the use of ANN architectures to imitate human brain nerves for learning. Computers are trained via the entering of large amounts of data with no answers. The system adjusts the inter-synaptic weight when the results are wrong. The process is repeated until the output is close to the correct answer. Finally, the computer becomes able to make judgments after accepting an input message based on its previous learning experience. In order to get the correct output result, the ANN system needs to perform a large number of Iterative Matrix Multiplication Operations. So how to make the computer perform fast calculations and get the correct results while reducing energy consumption is crucial to the future development of artificial intelligence systems.

Modern computers mainly use the Von Neumann architecture’s central processing unit for computing. The CPU retrieves data from the memory, where data is stored, in order to perform operations then sends the results back to the memory for storage. Because the read and write speed of the memory is much slower than that of the CPU operation, this constant back and forth can greatly limit the processing speed of the computer when processing a large amount of data (Figure 31). Artificial neural network computing based on non-volatile memory has attracted a lot of attention in recent years because RRAM can realize a memory array architecture in the form of the Crossbar and operate with extremely low power consumption. The array structure is more suitable for vector and matrix multiplication operations and can realize In-memory Computing technology, which has great potential for application in the future development of various AI technologies [46] (Figure 32).

Figure 31.　Von Neumann Computing Architecture Bottleneck [40]

Figure 32.　Von Neumann Computing Architecture Has the Opportunity to Break Through the Computing and Storage Architectural Bottleneck [46]

The rise of an emerging memory technology will invigorate the global IT industry, which will in turn affect a wide range of industries (Figure 33). It will influence everything from upstream Microprocessor Unit and Fabless companies, Integrated Device Manufacturers (IDM) and semiconductor manufacturing Foundries to those at the application end, such as companies in various equipment industries and more. According to survey reports, the next few years will be the most critical period in the development of RRAM. Various international manufacturers and emerging companies have set their sights on MCU, Mass Data Storage and new memory-centric computing architectures-related applications and are working out a clear RRAM development roadmap (Figure 34). The application of big data combined with AI technology continues to promote the development of memory technology, highlighting the need to better integrate it with system computing resources for the sake of improving both performance and efficiency. Today’s multi-core processing architecture simply cannot meet future real-time computing needs. At this critical time, using the biomimetic properties of 1T1R component arrays and logic operations to expand the applications and development of smart computing components is the obvious choice (Figure 35).

Figure 34.　RRAM Development Roadmap by Related Semiconductor Manufacturers [45]

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Memory occupies an extremely important position in the semiconductor industry. At present, the global memory market is still dominated by the mainstream DRAM and NAND Flash, which account for more than 90% of memory applications. However, in recent years, as the semiconductor industry continues to move towards smaller and smaller technology nodes, DRAM and NAND Flash are facing serious scaling challenges. DRAM is already approaching its scaling limits, and NAND Flash is undergoing a full transformation into 3D architectures. The two have also encountered obstacles in the advanced applications of high-speed computing. In this digital era, with the explosive rise of artificial intelligence, the Internet of Things, and 5G, demand for data processing is soaring. As such, players in the semiconductor industry are increasing their R&D investments in emerging memory technologies, beginning the search for more cost effective, faster and more efficient storage solutions.

Whether it is in terms of scalability, operating energy consumption, reading and writing speed, or endurance, the emerging next generation memories being developed, such as FRAM, PRAM, MRAM, and RRAM, all outperform today’s stable DRAM and NAND Flash architectures. Compared to DRAM, they can reduce power consumption by at least 20％, and, since they can all directly override old data without erasing it, they can cut down on the high energy used by Flash Memory for erasure. This would also reduce time delays caused by the need for data erasure and reduce or eliminate the need for a charge pump. Furthermore, all new memory technologies are capable of the random access of data at storage locations, so there is no need for the current memory architecture where single access is achieved by separately retaining two copies of data in the Flash memory and in the DRAM. All of the above features will help bring about significant improvements in performance and power-saving. What’s more, emerging memory technologies have the potential to enable on-chip designs. In other words, logic ICs and memory components can be integrated into the same chip. By endowing a single chip with both computing and storage functions, such a design could not only achieve outstanding transmission performance but also reduce chip sizes. This is very attractive for IoT and artificial intelligence devices that often require large amounts of data computing and storage.

However, though many emerging memory technologies have been developed, very few will have the chance to succeed in this competitive industry. As far as the current emerging memories being developed are concerned, there are still none as fast as SRAM and DRAM, and, for at least the next few years, none can compete with NAND Flash in terms of cost effectiveness. Considering economic supply and demand, NAND Flash is very cheap to manufacture. As such, most chip suppliers are willing to accept the complex writing process and high power consumption of Flash memory in exchange for the low cost advantage to meet consumer expectations. Therefore, how to achieve the goals of a small size, high computing power, and ultra-low power consumption at a low cost will be the next generation memory’s key to victory amidst fierce market competition.

“Resistive memory” is currently the most attractive solution for replacing existing memory application technology. Compared to other emerging storage technologies, resistive memory has considerable advantages in power consumption and speed. In addition, its structure is particularly simple, and the resistance material can be made using binary metal oxides commonly used in semiconductor processes such as titanium dioxide, hafnium oxide, and nickel oxide, etc. Therefore, it has the potential to create low-cost products. According to the forecast of the market research agency GII, the global resistive memory market will grow at a CAGR rate of 29.9％ from 2018 to 2023. As far as market investment is concerned, the competition between the major wafer foundries TSMC and Samsung has expanded rapidly in recent years from logic chips to the memory market. Both companies have made resistive memory a key technology development target. What’s more, the major semiconductor equipment manufacturer Applied Materials Inc. released its Endura Impulse PVD in 2019. It can provide precise deposition and control of multiple materials used in resistive memory. Additionally, in early 2020, resistive memory maker Crossbar and several other companies co-founded an AI consortium named SCAiLE, which is committed to providing a high-speed, energy efficient AI platform. The main work of the alliance is to combine resistive memory, advanced computer hardware and optimized neural network road algorithms to provide low-power smart computing solutions. With successive investments by many semiconductor factories and equipment suppliers, it is believed that resistive memory is bound to rise rapidly and become the mainstream technology of the next generation memory market.

This article provided a comprehensive introduction to the technical architecture of resistive memory and its applications. It also explained the physical mechanism behind the non-linear change of resistance during the operation of the component. Its purpose was to help readers quickly learn about and understand this forward-looking technology and its excellent market potential. The scope of Professor Yeong-Her Wang’s research is very extensive. His research team has published more than 400 academic journal articles and conference papers and obtained more than 100 related patents in a variety of fields including semiconductor components and physics, microwave integrated circuits, and optoelectronic components. In addition, between 2007 and 2020, Professor Wang served successively as the vice president then president of the National Experimental Research Institute of the Ministry of Science and Technology and is responsible for building a domestic R&D platform. He has also contributed greatly to supporting academic research, promoting forward-looking technologies and nurturing scientific and technological talents, etc. MA-tek is very honored to join hands with Professor Wang this year to carry out industry-university cooperation by providing the complete range of analysis services required by the team for resistive memory and III-V HEMT research. MA-tek has a comprehensive collection of testing equipment and the professional technical experience needed to meet the various analysis and testing needs of advanced semiconductor processes and packaging.