Breakthrough in High Power Chip Testing Limits: MA-tek Launches CoWoS Hybrid Power Latch-Up Testing Solution

As the demand for AI and high-performance computing surges, major manufacturers are investing in the development of high-power chips, particularly the CoWoS packaging technology. These advanced projects that combine logic chips with high bandwidth memory (HBM) have powerful performance, but their power consumption often reaches hundreds of watts, and even exceeds the kilowatt (kW) level. This trend presents unprecedented challenges for "Latch-Up (LU) testing" in reliability analysis.

Testing Bottleneck: Why do traditional devices experience "insufficient power supply" before CoWoS?

The current 2.5D/3D packaging technology for high-power logic chips stacked with high bandwidth memory (HBM) (such as TSMC's CoWoS) has become mainstream. However, traditional Latch-Up testing devices often encounter two major fatal bottlenecks when facing high-power chips:

• The number of power supplies is severely insufficient:

  In complex packaging of 2.5D or 3D, multiple chips are stacked internally, each with different operating voltages, and a strict control of the power-up sequence is required. However, the industry-standard Thermo Fisher MK4 testing platform can provide a maximum of only 7 power supplies, making it difficult to meet the demands of complex advanced packaging.

• Current supply capability is limited:

  The maximum single group current limit of the MK4 testing machine is usually 10A, and the total current does not exceed 18A. Although the Latch-Up test evaluates static power consumption, the maximum current demand during the testing process for such high-power projects often reaches tens or even hundreds of amperes, which traditional devices cannot drive smoothly.。

To break through physical limitations, MA-tek has launchedThe integrated solution of "MK4 + Hybrid Power Supply"The "Hybrid" concept supports up to 2304 pins, allowing for the simultaneous scheduling of the precise internal power supply of the MK4 and a powerful external power system, as if a powerful "external heart" has been installed in the testing machine. The external power system has extremely robust specifications and safety features:

• Ultra-high current output:

  Expanded with 4 sets of external high-power supplies (including 1 set of 6V/250A and 3 sets of 6V/125A), directly elevating the current supply capability to extreme specifications of several hundred amperes, thoroughly addressing the pain point of high-power chips being "unable to operate."

• Precision Process Control:

  Synchronize the internal power supply of the MK4 with external high-power supplies, and precisely control the complex power-up and power-down sequence through programming. Each external power supply fully supports the critical "Over Voltage" condition in Latch-Up testing.

• Advanced testing capabilities:

  Support for Analog programming and data return, and each external power supply can support Latch-Up's "Over Voltage" test conditions.

• Comprehensive temperature control and high expandability:

  High power testing is accompanied by high temperatures that cannot be ignored. Our testing framework is fully equipped with an ATC (Temperature Control System) and Chiller (Cooling Device) to ensure the safety and stability of the chip during extreme testing. The system also has future expansion flexibility, ready to meet higher specification challenges at any time.

In addition to powerful power support, the MK4 system also integrates multiple advanced analysis functions, allowing reliability testing to evolve into in-depth precision component characteristic analysis:

• Built-in C.T. (Curve Tracer) curve tracing:

  Component characteristic diagnosis can be performed immediately before and after ESD testing and Latch-Up testing, assisting engineers in interpreting failure mechanisms.

• Automatic capture of pulse waveforms:

  Can automatically record HBM/MM pulse waveforms.

• High-speed vector and preprocessing:

  Provides vector functionality with a frequency of 10MHz and a depth of 256K. This is crucial for modern logic chips, as the chip must be guided to a specific operating state through "pre-processing vectors" before conducting Latch-Up testing.